OBJECTIVE 9: Small Form Factor Data Center

As traditional datacentres strive to become more power efficient, FPGAs will begin to be deployed in more and more applications. A typical FPGA co-processor card delivering significant acceleration while consume only 25W of power. Compare this to a GPU card which consumes up to 300W. The massive parallel resources of an FPGA allow the hardware to execute functions in only a few clock cycles instead of the hundreds to thousands of clock cycles that the sequential operation on of a processor would require. Because so few clock cycles are required, FPGAs can operate with much slower clocks speeds and still provide a performance boost. The lower clock speeds result in lower power consumption, making an FPGA coprocessor much more power-efficient than a processor.
For circumstances where users need datacentre levels of performance but within small, mobile platforms (such as a truck) the SWAP considerations familiar to the embedded designer begin to resonate strongly, forcing users to embrace energy efficient accelerators more than would otherwise be the case. FPGAs are then considered “essential” rather than “desirable”.
OPERA will provide a datacentre in a box approach with a chassis are able to have up to 180 servers in a single 4.3U chassis. This also includes redundant low latency network switches and some storage capabilities, which can be shared among all servers inside the chassis. Smaller chassis might also be considered to fit use cases where low power servers need to be integrated into environment where the size is a constraint, such as a truck. This will be the one of the objective of OPERA where orders of magnitude acceleration are demanded within a scalable, small form factor. The consortium ability to engineer a high performance FPGA coprocessor that is compatible with datacentre-in-a-box platform is key to achieving acceptable application performance outside the datacentre. A next-generation datacenter-in-a-box based on outcomes of OPERA will be provided for improving energy efficiency of computing resources. Moreover an assessment of currently systems will be performed in order to optimize process and power waste.

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This project has received funding from the European's Union Horizon 2020 research and innovation programme under grant agreement no 688386.
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