OBJECTIVE 4: High performance on Ultra Low Power Architecture

In the cases where the improvement in software implementation and addition of hardware function reach their limit a new technological approach should be considered. In the context of OPERA project two main technological researches will be considered. Regarding the first direction STMicroelectronics as silicon provider is investigating in the last years on many solutions based on 3D integration of SoCs. In the context of computer vision there are several researches on going on the integration of optical interface and computing core in a single 3D stacked SoC. These researches are also conducted also in the perimeter of Artemis and ECSEL programs. The results in this area will provide a completely new type of device that will increase substantially the efficiency, with a new type of connections for data between sensor and processing unit, directly accessed, and with a substantial reduction in terms of power consumption, due to the new ULP technologies involved. The second main technology research activity that will be beneficial for OPERA will be the definition of a new many-core based on ULP processors capable to implement new processing algorithms based on convolutional neural networks. The technology that will be used to realize this architecture in a SoC will be the FD-SOI technology that will allow the extreme miniaturization of the chip with a significant reduction of the power consumption respect to the traditional bulk silicon devices.
OPERA will also provide an active development in terms of highly parallel applications and libraries to be applied to these two many core architectures.

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This project has received funding from the European's Union Horizon 2020 research and innovation programme under grant agreement no 688386.
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